0000000000000000000000000000000000000000 b9a433de37683c5aaf685f2ccfcb3e5ad5a91a29 Marc Feeley <feeley@iro.umontreal.ca> 1501155856 -0400	clone: from git@github.com:gambit/gambit.git
b9a433de37683c5aaf685f2ccfcb3e5ad5a91a29 e37c9920254f85b16b59ddf0b9efea572447ad9c Marc Feeley <feeley@iro.umontreal.ca> 1501156306 -0400	checkout: moving from master to bbv
e37c9920254f85b16b59ddf0b9efea572447ad9c b9a433de37683c5aaf685f2ccfcb3e5ad5a91a29 Marc Feeley <feeley@iro.umontreal.ca> 1501156333 -0400	checkout: moving from bbv to master
b9a433de37683c5aaf685f2ccfcb3e5ad5a91a29 e37c9920254f85b16b59ddf0b9efea572447ad9c Marc Feeley <feeley@iro.umontreal.ca> 1501156680 -0400	checkout: moving from master to bbv
e37c9920254f85b16b59ddf0b9efea572447ad9c 16f6272c4895147bcd60d981708f5a46d541b226 Marc Feeley <feeley@iro.umontreal.ca> 1501160346 -0400	commit: Handle closure creation
16f6272c4895147bcd60d981708f5a46d541b226 b9a433de37683c5aaf685f2ccfcb3e5ad5a91a29 Marc Feeley <feeley@iro.umontreal.ca> 1501165252 -0400	checkout: moving from bbv to master
b9a433de37683c5aaf685f2ccfcb3e5ad5a91a29 16f6272c4895147bcd60d981708f5a46d541b226 Marc Feeley <feeley@iro.umontreal.ca> 1501165512 -0400	checkout: moving from master to bbv
16f6272c4895147bcd60d981708f5a46d541b226 b9a433de37683c5aaf685f2ccfcb3e5ad5a91a29 Marc Feeley <feeley@iro.umontreal.ca> 1501165891 -0400	checkout: moving from bbv to master
b9a433de37683c5aaf685f2ccfcb3e5ad5a91a29 16f6272c4895147bcd60d981708f5a46d541b226 Marc Feeley <feeley@iro.umontreal.ca> 1501166466 -0400	checkout: moving from master to bbv
16f6272c4895147bcd60d981708f5a46d541b226 b9a433de37683c5aaf685f2ccfcb3e5ad5a91a29 Marc Feeley <feeley@iro.umontreal.ca> 1501676124 -0400	checkout: moving from bbv to master
b9a433de37683c5aaf685f2ccfcb3e5ad5a91a29 97c9f15393aab89e97525405c17f32753b3f411e Marc Feeley <feeley@iro.umontreal.ca> 1501676135 -0400	pull: Fast-forward
97c9f15393aab89e97525405c17f32753b3f411e 596e25e38b4645994f4ff62ce03fe33529dbd254 Marc Feeley <feeley@iro.umontreal.ca> 1501684655 -0400	commit: Clean up generation of CFG (gsc -cfg option)
596e25e38b4645994f4ff62ce03fe33529dbd254 82982f5c34234ce5d2f37e86a56f232d7f3575bc Marc Feeley <feeley@iro.umontreal.ca> 1501853309 -0400	commit: Universal backend: fix inlining of ##identity as a test
82982f5c34234ce5d2f37e86a56f232d7f3575bc 4026acfd2ff0c47e9172736f5c920c44086911d1 Marc Feeley <feeley@iro.umontreal.ca> 1501853433 -0400	commit: Improve optimize-dead-definitions declaration and implement generation of dependency graph with -dg option
4026acfd2ff0c47e9172736f5c920c44086911d1 aca3c80bc58ce85b71f4e42829231f4f868ea4ef Marc Feeley <feeley@iro.umontreal.ca> 1501862925 -0400	commit: Improve dependency graph generation so that undefined variables are colored black (and fix bootstrap problem)
aca3c80bc58ce85b71f4e42829231f4f868ea4ef 81bf1e49caa7bc26df53545410f6060e58c548f8 Marc Feeley <feeley@iro.umontreal.ca> 1501894821 -0400	pull: Fast-forward
81bf1e49caa7bc26df53545410f6060e58c548f8 a44589a9a5141b478dd6da25ae04cf94348acec1 Marc Feeley <feeley@iro.umontreal.ca> 1502196601 -0400	commit: Fix issue #293 (clock_gettime not available before MacOS 10.12, must do "export MACOSX_DEPLOYMENT_TARGET=10.11" before "make" to disable use of clock_gettime)
a44589a9a5141b478dd6da25ae04cf94348acec1 1dea06958c407b40b5245f9a31538246d7167dbd Marc Feeley <feeley@iro.umontreal.ca> 1502548400 -0400	commit: Add macro to check presence of compilation options
1dea06958c407b40b5245f9a31538246d7167dbd a3b10ffaed433cf92518db991d2d4745c12f1a40 Marc Feeley <feeley@iro.umontreal.ca> 1502593129 -0400	commit: Replace -check and -force gsc options by features declared with define-cond-expand-feature
a3b10ffaed433cf92518db991d2d4745c12f1a40 e956b8e428e7f6444aefe33d74b0db067189d751 Marc Feeley <feeley@iro.umontreal.ca> 1502593185 -0400	pull: Merge made by the 'recursive' strategy.
e956b8e428e7f6444aefe33d74b0db067189d751 6ef0bc390fb204bcdeb57b1cb8d166adc965d218 Marc Feeley <feeley@iro.umontreal.ca> 1502721209 -0400	commit: Avoid using RTLIB_COND_EXPAND_FEATURES in bootstrap of gsc because most recent release does not have a configure script that supports it (will add at next release)
6ef0bc390fb204bcdeb57b1cb8d166adc965d218 5649d60d1abb8a354c9aff59d1e5c256156176e4 Marc Feeley <feeley@iro.umontreal.ca> 1502721300 -0400	commit: Refactor _num.scm to allow selectively disabling support for bignums, ratnums and cpxnums
5649d60d1abb8a354c9aff59d1e5c256156176e4 39cfc542a173677e57ef2eab1284b392ef9ea1b9 Marc Feeley <feeley@iro.umontreal.ca> 1502723719 -0400	commit: For bootstrap with latest release, define-cond-expand-feature must take a single parameter
39cfc542a173677e57ef2eab1284b392ef9ea1b9 6af0eeb777857b58685ba5d692dbf0541373276a Marc Feeley <feeley@iro.umontreal.ca> 1502842857 -0400	commit: Add --enable-default-runtime-options=... configure option to change runtime option defaults
6af0eeb777857b58685ba5d692dbf0541373276a 296d2643f6d6527166d8fa465f680245c4e3441d Marc Feeley <feeley@iro.umontreal.ca> 1502842864 -0400	pull: Merge made by the 'recursive' strategy.
296d2643f6d6527166d8fa465f680245c4e3441d 395789c2100870dcde745b17dd2be48d49e1c025 Marc Feeley <feeley@iro.umontreal.ca> 1503150216 -0400	commit: Add wrong-processor-c-return-exception in preparation for SMP thread scheduler
395789c2100870dcde745b17dd2be48d49e1c025 55cc8efcdf66b84303349520fe8b4894cb497df9 Marc Feeley <feeley@iro.umontreal.ca> 1503150998 -0400	commit: Expose ___device_select_abort to Scheme (useful for interprocessor interrupts and SMP thread scheduler)
55cc8efcdf66b84303349520fe8b4894cb497df9 5477cf9a2bfd384fbef82337e51ed2726297f3b6 Marc Feeley <feeley@iro.umontreal.ca> 1503155901 -0400	commit: Improve handling of abnormal VM termination when using multiple processors
5477cf9a2bfd384fbef82337e51ed2726297f3b6 703f1fac6268c0d0c8e3a69b1d30cef9c0b4ae99 Marc Feeley <feeley@iro.umontreal.ca> 1503159406 -0400	commit: Add fields to thread structure for compatibility with SMP thread scheduler
703f1fac6268c0d0c8e3a69b1d30cef9c0b4ae99 7ff7cbc9328e04fb1cfa9184bf685fa822bb69c8 Marc Feeley <feeley@iro.umontreal.ca> 1503159799 -0400	commit: Processor should be locked when calling ##os-condvar-select!, but not locked when actually waiting
7ff7cbc9328e04fb1cfa9184bf685fa822bb69c8 ae4a12214d9872fe93052c768d20d344099375c4 Marc Feeley <feeley@iro.umontreal.ca> 1503160331 -0400	commit: Keep track of last processor that executed a thread (useful for interprocessor interrupt of a thread in SMP thread scheduler)
ae4a12214d9872fe93052c768d20d344099375c4 62cce77dcb59cd807d8b0376a405acfc3deab1e6 Marc Feeley <feeley@iro.umontreal.ca> 1503163845 -0400	commit: Change API and implementation of heartbeat interrupt setter/getter to reflect that it is global to the process
62cce77dcb59cd807d8b0376a405acfc3deab1e6 67ef1b885cf8bc21646158e5bd1b61e81ce43ea9 Marc Feeley <feeley@iro.umontreal.ca> 1503166297 -0400	commit: Combine sources of SMP and non-SMP thread schedulers in same file to simplify development
67ef1b885cf8bc21646158e5bd1b61e81ce43ea9 0e0604cfedd0a97f8e2ea683c6b633bb35a26960 Marc Feeley <feeley@iro.umontreal.ca> 1503181543 -0400	commit: Adjust appveyor script for new build steps
0e0604cfedd0a97f8e2ea683c6b633bb35a26960 7dcc7b34917a7fccc8934ad361c14d24eb825101 Marc Feeley <feeley@iro.umontreal.ca> 1503191325 -0400	commit: Tweak appveyor script to try to avoid time limit
7dcc7b34917a7fccc8934ad361c14d24eb825101 fb350ab8f906f6378a9bd2514b082e8f6c21c0c7 Marc Feeley <feeley@iro.umontreal.ca> 1503280165 -0400	commit: For Appveyor, use Microsoft Visual Studio 14.0 and --enable-multiple-threaded-vms
fb350ab8f906f6378a9bd2514b082e8f6c21c0c7 c966999cac1bc13b238f241b28e66dda4d3a7231 Marc Feeley <feeley@iro.umontreal.ca> 1503281444 -0400	commit: Support --enable-smp configure option to enable SMP Scheme thread scheduler (currently experimental)
c966999cac1bc13b238f241b28e66dda4d3a7231 22bef58a1086f83ad12dc61bbf7a11030b611cac Marc Feeley <feeley@iro.umontreal.ca> 1503282124 -0400	commit: Check availability of WIN32 CONDITION_VARIABLE type
22bef58a1086f83ad12dc61bbf7a11030b611cac 7f8905d7e9bbdc431a9cd1b7ef307361c5ebcb80 Marc Feeley <feeley@iro.umontreal.ca> 1503326187 -0400	commit: Make garbage collector report more precise for sub-millisecond GC pauses
7f8905d7e9bbdc431a9cd1b7ef307361c5ebcb80 7d2ee5dd17372c6401843bb04aafa86ed5d7e834 Marc Feeley <feeley@iro.umontreal.ca> 1503333236 -0400	commit: On Appveyor avoid --enable-multiple-threaded-vms when using MSVC
7d2ee5dd17372c6401843bb04aafa86ed5d7e834 c11f4ad7c2b8386c0fd9059c89acb0b21679adef Marc Feeley <feeley@iro.umontreal.ca> 1503594409 -0400	commit: Add ##continuation-last to get the oldest continuation of a continuation
c11f4ad7c2b8386c0fd9059c89acb0b21679adef a81555343edf9393cad77fc9434e25a2ec8cb60f Marc Feeley <feeley@iro.umontreal.ca> 1503594457 -0400	commit: Avoid needless recursion in ##number->string
a81555343edf9393cad77fc9434e25a2ec8cb60f 0008402fe4407af1ef20f76bdc8808fc6bb54a32 Marc Feeley <feeley@iro.umontreal.ca> 1503594465 -0400	pull: Merge made by the 'recursive' strategy.
0008402fe4407af1ef20f76bdc8808fc6bb54a32 1677e59ed005ca99389467062038fcb8ca3e24fd Marc Feeley <feeley@iro.umontreal.ca> 1503679505 -0400	pull: Fast-forward
1677e59ed005ca99389467062038fcb8ca3e24fd 2b3f2ec6f30683f4ab0655f1e41e1ac8f81ef67e Marc Feeley <feeley@iro.umontreal.ca> 1503679598 -0400	commit: Correct the explanation of build steps
2b3f2ec6f30683f4ab0655f1e41e1ac8f81ef67e cc7a43b26a6b8c7614841b31f09c10c49a9790c3 Marc Feeley <feeley@iro.umontreal.ca> 1503683618 -0400	commit: Add ##flonum->string-host primitive
cc7a43b26a6b8c7614841b31f09c10c49a9790c3 2dfcbfee2670382268c0587d34f6f812abe80211 Marc Feeley <feeley@iro.umontreal.ca> 1503697109 -0400	commit: Print floating point numbers using ##flonum->string-host when bignums are not supported
2dfcbfee2670382268c0587d34f6f812abe80211 98d2cc0460c73364603fce8c594c2cf57f7c7d91 Marc Feeley <feeley@iro.umontreal.ca> 1503953434 -0400	commit: Make interrupt masking functions available from include/gambit.h
98d2cc0460c73364603fce8c594c2cf57f7c7d91 6587c2e4bffdef85cf7793217e9d04a5a1611610 Marc Feeley <feeley@iro.umontreal.ca> 1504011250 -0400	commit: Export through gambit.h functions to mask child interrupts; unblock SIGCHLD when Gambit runtime system starts (this allows removal of special case handling of SIGCHLD when forking a process to avoid problems when subprocess is a Gambit program)
6587c2e4bffdef85cf7793217e9d04a5a1611610 300db59e1d3b66bcd597f617849df0274d2a4472 Marc Feeley <feeley@iro.umontreal.ca> 1504014522 -0400	commit: Move child interrupt handling functions so that they are compiled when --enable-ansi-c is used
300db59e1d3b66bcd597f617849df0274d2a4472 300db59e1d3b66bcd597f617849df0274d2a4472 Marc Feeley <feeley@iro.umontreal.ca> 1506310094 -0400	checkout: moving from master to v4.8.8-402-g300db59
300db59e1d3b66bcd597f617849df0274d2a4472 300db59e1d3b66bcd597f617849df0274d2a4472 Marc Feeley <feeley@iro.umontreal.ca> 1506310138 -0400	checkout: moving from 300db59e1d3b66bcd597f617849df0274d2a4472 to master
300db59e1d3b66bcd597f617849df0274d2a4472 24f129b36299e504e78f754259b5e4bbf6406541 Marc Feeley <feeley@iro.umontreal.ca> 1507986228 -0400	commit: Improve build procedure so a simple configure+make will work on a clone of the git repo
24f129b36299e504e78f754259b5e4bbf6406541 80d9efd0c7773df455e5126754551a1cef0de33e Marc Feeley <feeley@iro.umontreal.ca> 1507987141 -0400	commit: Add "make bootclean" when gsc-boot is rebuilt to force recompilation of .scm files
80d9efd0c7773df455e5126754551a1cef0de33e d379f47d51a8d7905b172707c6a99191ca983aaa Marc Feeley <feeley@iro.umontreal.ca> 1507988710 -0400	commit: Update Travis CI and Appveyor scripts for new build procedure
d379f47d51a8d7905b172707c6a99191ca983aaa fb63ffa05dd72d0aee597c1f476426e05c7390b6 Marc Feeley <feeley@iro.umontreal.ca> 1509728516 -0400	pull: Fast-forward
fb63ffa05dd72d0aee597c1f476426e05c7390b6 85e098240991e068f678a03b65bb06c58ad4997b Marc Feeley <feeley@iro.umontreal.ca> 1509728632 -0400	commit: Add unit test for issue #303
85e098240991e068f678a03b65bb06c58ad4997b c47602c4f4ae087ec013649977085fc2a6d81f1d Marc Feeley <feeley@iro.umontreal.ca> 1509728786 -0400	commit: Return correct value for ___thread_sigmask1
c47602c4f4ae087ec013649977085fc2a6d81f1d 54709a317cb65d16c5acdac0517091d0825e552f Marc Feeley <feeley@iro.umontreal.ca> 1509733529 -0400	commit: Improve performance of deep stack recursions that cause the current stack section to overflow
54709a317cb65d16c5acdac0517091d0825e552f d34e670ddcfa6907ce9bccd7037bcd8bbc33af51 Marc Feeley <feeley@iro.umontreal.ca> 1510416074 -0500	pull: Fast-forward
d34e670ddcfa6907ce9bccd7037bcd8bbc33af51 16f6272c4895147bcd60d981708f5a46d541b226 Marc Feeley <feeley@iro.umontreal.ca> 1510686234 -0500	checkout: moving from master to bbv
16f6272c4895147bcd60d981708f5a46d541b226 d34e670ddcfa6907ce9bccd7037bcd8bbc33af51 Marc Feeley <feeley@iro.umontreal.ca> 1510700626 -0500	checkout: moving from bbv to d34e670ddcfa6907ce9bccd7037bcd8bbc33af51^0
d34e670ddcfa6907ce9bccd7037bcd8bbc33af51 dd76df09a0ed21edea7c9cce32977d10d78a3080 Marc Feeley <feeley@iro.umontreal.ca> 1510700627 -0500	rebase: Add infrastructure for type analysis in preparation for versioning
dd76df09a0ed21edea7c9cce32977d10d78a3080 912bca6065e8bb596712cb21cd7ca3cfafc77c14 Marc Feeley <feeley@iro.umontreal.ca> 1510700627 -0500	rebase: Add experimental basic block versioning transformation
912bca6065e8bb596712cb21cd7ca3cfafc77c14 12a82b0de67d33ba947beaab9091f51fd234eb2e Marc Feeley <feeley@iro.umontreal.ca> 1510700627 -0500	rebase: Handle closure creation
12a82b0de67d33ba947beaab9091f51fd234eb2e 12a82b0de67d33ba947beaab9091f51fd234eb2e Marc Feeley <feeley@iro.umontreal.ca> 1510700627 -0500	rebase finished: returning to refs/heads/bbv
12a82b0de67d33ba947beaab9091f51fd234eb2e d15fd0c2042bbb2ca044afcd055dc1158bffb46e Marc Feeley <feeley@iro.umontreal.ca> 1510702337 -0500	commit (merge): Merge with master
d15fd0c2042bbb2ca044afcd055dc1158bffb46e d34e670ddcfa6907ce9bccd7037bcd8bbc33af51 Marc Feeley <feeley@iro.umontreal.ca> 1510702371 -0500	checkout: moving from bbv to master
d34e670ddcfa6907ce9bccd7037bcd8bbc33af51 d6238d5db039f25abd05e1a26f47aa857be56c4b Marc Feeley <feeley@iro.umontreal.ca> 1510702384 -0500	pull: Fast-forward
d6238d5db039f25abd05e1a26f47aa857be56c4b d15fd0c2042bbb2ca044afcd055dc1158bffb46e Marc Feeley <feeley@iro.umontreal.ca> 1510702411 -0500	checkout: moving from master to bbv
d15fd0c2042bbb2ca044afcd055dc1158bffb46e d6238d5db039f25abd05e1a26f47aa857be56c4b Marc Feeley <feeley@iro.umontreal.ca> 1510703030 -0500	checkout: moving from bbv to master
d6238d5db039f25abd05e1a26f47aa857be56c4b dd673e5565dc45f2ddef5ae8f763c06a0bcf724a Marc Feeley <feeley@iro.umontreal.ca> 1510751884 -0500	commit: Use more compact frame description for improving GVM listing readability
dd673e5565dc45f2ddef5ae8f763c06a0bcf724a d15fd0c2042bbb2ca044afcd055dc1158bffb46e Marc Feeley <feeley@iro.umontreal.ca> 1510855651 -0500	checkout: moving from master to bbv
d15fd0c2042bbb2ca044afcd055dc1158bffb46e dd673e5565dc45f2ddef5ae8f763c06a0bcf724a Marc Feeley <feeley@iro.umontreal.ca> 1510855682 -0500	checkout: moving from bbv to dd673e5565dc45f2ddef5ae8f763c06a0bcf724a^0
dd673e5565dc45f2ddef5ae8f763c06a0bcf724a abe61c77599760db01339c6273ae32519d550671 Marc Feeley <feeley@iro.umontreal.ca> 1510855682 -0500	rebase: Add infrastructure for type analysis in preparation for versioning
abe61c77599760db01339c6273ae32519d550671 0922aeb874207d983d802628d72878bb0630dc49 Marc Feeley <feeley@iro.umontreal.ca> 1510855856 -0500	rebase: Add experimental basic block versioning transformation
0922aeb874207d983d802628d72878bb0630dc49 d4cbfe6c32e4026090e8ff496943bc5a661bc184 Marc Feeley <feeley@iro.umontreal.ca> 1510855869 -0500	rebase: Handle closure creation
d4cbfe6c32e4026090e8ff496943bc5a661bc184 d4cbfe6c32e4026090e8ff496943bc5a661bc184 Marc Feeley <feeley@iro.umontreal.ca> 1510855880 -0500	rebase finished: returning to refs/heads/bbv
d4cbfe6c32e4026090e8ff496943bc5a661bc184 772860b968478d46d5f2856ed20dea33725ccd23 Marc Feeley <feeley@iro.umontreal.ca> 1510855968 -0500	pull: Merge made by the 'recursive' strategy.
772860b968478d46d5f2856ed20dea33725ccd23 dd673e5565dc45f2ddef5ae8f763c06a0bcf724a Marc Feeley <feeley@iro.umontreal.ca> 1510858239 -0500	checkout: moving from bbv to dd673e5565dc45f2ddef5ae8f763c06a0bcf724a^0
dd673e5565dc45f2ddef5ae8f763c06a0bcf724a b158bb51735a145c2f5fc759dff8e6ba011fe178 Marc Feeley <feeley@iro.umontreal.ca> 1510858239 -0500	rebase: Add infrastructure for type analysis in preparation for versioning
b158bb51735a145c2f5fc759dff8e6ba011fe178 2f6b51261105b11d3bfe543c3288ffc998ab9d18 Marc Feeley <feeley@iro.umontreal.ca> 1510858368 -0500	rebase: Add experimental basic block versioning transformation
2f6b51261105b11d3bfe543c3288ffc998ab9d18 e6a374b36557c9a43bbf7136b47dbac41d4fe0c4 Marc Feeley <feeley@iro.umontreal.ca> 1510858473 -0500	rebase: Improve Visual Studio configure script to accept more of the standard configure script options
e6a374b36557c9a43bbf7136b47dbac41d4fe0c4 fd16ad134d4d58627fda2b47c4f1208cb4d7b461 Marc Feeley <feeley@iro.umontreal.ca> 1510858473 -0500	rebase: Handle closure creation
fd16ad134d4d58627fda2b47c4f1208cb4d7b461 fd16ad134d4d58627fda2b47c4f1208cb4d7b461 Marc Feeley <feeley@iro.umontreal.ca> 1510858586 -0500	rebase finished: returning to refs/heads/bbv
fd16ad134d4d58627fda2b47c4f1208cb4d7b461 551933ccf0826ba86e65a845cc1cc1abdd23e31b Marc Feeley <feeley@iro.umontreal.ca> 1510858630 -0500	pull: Merge made by the 'recursive' strategy.
551933ccf0826ba86e65a845cc1cc1abdd23e31b dd673e5565dc45f2ddef5ae8f763c06a0bcf724a Marc Feeley <feeley@iro.umontreal.ca> 1510859321 -0500	checkout: moving from bbv to master
dd673e5565dc45f2ddef5ae8f763c06a0bcf724a fce9358fd9d28d2e166202fa90901c28bbccc711 Marc Feeley <feeley@iro.umontreal.ca> 1510862153 -0500	commit: Add inlining of bitwise-not/-ior/-and/-xor operations
fce9358fd9d28d2e166202fa90901c28bbccc711 29ed48bb688e8302d2430b5d24a2fc7c2039aeec Marc Feeley <feeley@iro.umontreal.ca> 1510952684 -0500	commit: Change API of ##make-raw-device-port to make it more flexible for other types of raw devices
29ed48bb688e8302d2430b5d24a2fc7c2039aeec 5f71e002a55ced80d487c406b3bc8f23d964e5e2 Marc Feeley <feeley@iro.umontreal.ca> 1513272673 -0500	commit: Add -nb-gvm-regs and -nb-arg-regs compiler options to specify number of GVM registers and number of arguments passed in registers
5f71e002a55ced80d487c406b3bc8f23d964e5e2 5f71e002a55ced80d487c406b3bc8f23d964e5e2 Marc Feeley <feeley@iro.umontreal.ca> 1513272712 -0500	checkout: moving from master to cpu
5f71e002a55ced80d487c406b3bc8f23d964e5e2 d2af2c08e9803f87bdab7259b04e1e19de556098 Marc Feeley <feeley@iro.umontreal.ca> 1513272843 -0500	commit: Add a CPU target to support X86 and ARM
d2af2c08e9803f87bdab7259b04e1e19de556098 5f71e002a55ced80d487c406b3bc8f23d964e5e2 Marc Feeley <feeley@iro.umontreal.ca> 1515117648 -0500	checkout: moving from cpu to master
5f71e002a55ced80d487c406b3bc8f23d964e5e2 3fecbe938f23cd3c22b5a79b5a1bf6eb5b90c5fc Marc Feeley <feeley@iro.umontreal.ca> 1515117653 -0500	pull: Fast-forward
3fecbe938f23cd3c22b5a79b5a1bf6eb5b90c5fc e3d46a9741f12c5ed98eb4ed7827444f4c168ae6 Marc Feeley <feeley@iro.umontreal.ca> 1515118069 -0500	pull: Fast-forward
e3d46a9741f12c5ed98eb4ed7827444f4c168ae6 f2db45d3f5dd4ec2df4b82b683b496edc9a14f13 Marc Feeley <feeley@iro.umontreal.ca> 1515119007 -0500	commit: Fix forward reference
f2db45d3f5dd4ec2df4b82b683b496edc9a14f13 37b111a5ca3aeff9dc6cb8be470277a8c1e80f24 Marc Feeley <feeley@iro.umontreal.ca> 1515123282 -0500	commit: Avoid fatal heap overflow on test7 and test9 when configured with --enable-multiple-threaded-vms
37b111a5ca3aeff9dc6cb8be470277a8c1e80f24 fcaad6c85c1a92f4a729a62969693820cd6b7ef1 Marc Feeley <feeley@iro.umontreal.ca> 1517399405 -0500	pull: Fast-forward
fcaad6c85c1a92f4a729a62969693820cd6b7ef1 4ed1698c2747ec1b6589dd650f88bac97d1e535a Marc Feeley <feeley@iro.umontreal.ca> 1517487529 -0500	commit: Fix open-tcp-client so the address defaults to localhost
4ed1698c2747ec1b6589dd650f88bac97d1e535a 27f7ae1693536bda569515e7ec8dfa56cbdc87df Marc Feeley <feeley@iro.umontreal.ca> 1517531551 -0500	commit: Work around problems with syslog.h on macOS (Xcode 9.2 + gcc-7)
27f7ae1693536bda569515e7ec8dfa56cbdc87df 490f0a7d50125478f374330f0b8754bc0aee3746 Marc Feeley <feeley@iro.umontreal.ca> 1517535270 -0500	commit: Tolerate missing definitions for NETDB_INTERNAL and NETDB_SUCCESS
490f0a7d50125478f374330f0b8754bc0aee3746 d1991ba7e90ed0149964320f7cafa1a8289e61f0 Marc Feeley <feeley@iro.umontreal.ca> 1517946213 -0500	commit: Add pushf and popf x86 instructions
d1991ba7e90ed0149964320f7cafa1a8289e61f0 d2af2c08e9803f87bdab7259b04e1e19de556098 Marc Feeley <feeley@iro.umontreal.ca> 1517964502 -0500	checkout: moving from master to cpu
d2af2c08e9803f87bdab7259b04e1e19de556098 1a41e9d513567ff8d3ceaa09adbfbbaef8897202 Marc Feeley <feeley@iro.umontreal.ca> 1517964506 -0500	pull: Fast-forward
1a41e9d513567ff8d3ceaa09adbfbbaef8897202 a454eba5d8ca0acfbef65319b52e29446706a51d Marc Feeley <feeley@iro.umontreal.ca> 1517968066 -0500	commit: x86 backend: reserve space for Scheme stack and avoid nul bytes at labels
a454eba5d8ca0acfbef65319b52e29446706a51d d1991ba7e90ed0149964320f7cafa1a8289e61f0 Marc Feeley <feeley@iro.umontreal.ca> 1517969714 -0500	checkout: moving from cpu to master
d1991ba7e90ed0149964320f7cafa1a8289e61f0 a454eba5d8ca0acfbef65319b52e29446706a51d Marc Feeley <feeley@iro.umontreal.ca> 1517969729 -0500	checkout: moving from master to cpu
a454eba5d8ca0acfbef65319b52e29446706a51d d1991ba7e90ed0149964320f7cafa1a8289e61f0 Marc Feeley <feeley@iro.umontreal.ca> 1517969742 -0500	checkout: moving from cpu to master
d1991ba7e90ed0149964320f7cafa1a8289e61f0 a454eba5d8ca0acfbef65319b52e29446706a51d Marc Feeley <feeley@iro.umontreal.ca> 1517969750 -0500	checkout: moving from master to cpu
a454eba5d8ca0acfbef65319b52e29446706a51d d1991ba7e90ed0149964320f7cafa1a8289e61f0 Marc Feeley <feeley@iro.umontreal.ca> 1517969786 -0500	checkout: moving from cpu to master
d1991ba7e90ed0149964320f7cafa1a8289e61f0 a454eba5d8ca0acfbef65319b52e29446706a51d Marc Feeley <feeley@iro.umontreal.ca> 1517969797 -0500	checkout: moving from master to cpu
a454eba5d8ca0acfbef65319b52e29446706a51d a17206b3a3f018c5f5894dc838b7a3b7c9ed6225 Marc Feeley <feeley@iro.umontreal.ca> 1517969804 -0500	cherry-pick: Add pushf and popf x86 instructions
a17206b3a3f018c5f5894dc838b7a3b7c9ed6225 724f36e5b184c2c8f51f8726edac5e09abad7ec6 Marc Feeley <feeley@iro.umontreal.ca> 1518028898 -0500	pull: Fast-forward
724f36e5b184c2c8f51f8726edac5e09abad7ec6 513b5baa5c949ae0aa5f59f275302a07b83c9521 Marc Feeley <feeley@iro.umontreal.ca> 1519241923 -0500	commit: Fix issue #333 (wrong assumption about sigset_t size)
513b5baa5c949ae0aa5f59f275302a07b83c9521 d1991ba7e90ed0149964320f7cafa1a8289e61f0 Marc Feeley <feeley@iro.umontreal.ca> 1519241969 -0500	checkout: moving from cpu to master
d1991ba7e90ed0149964320f7cafa1a8289e61f0 de7ada2286d2fe85ade00a403c9470081efe7527 Marc Feeley <feeley@iro.umontreal.ca> 1519241979 -0500	cherry-pick: Fix issue #333 (wrong assumption about sigset_t size)
de7ada2286d2fe85ade00a403c9470081efe7527 e1393043997926e9ee4485f0ab49576ba91b22de Marc Feeley <feeley@iro.umontreal.ca> 1519241993 -0500	pull: Merge made by the 'recursive' strategy.
e1393043997926e9ee4485f0ab49576ba91b22de a07fd3207b46073274360b3baf3b722acb9802f1 Marc Feeley <feeley@iro.umontreal.ca> 1519243541 -0500	commit: Add specific procedure to generate one-byte x86 "int 3" instruction
a07fd3207b46073274360b3baf3b722acb9802f1 f01f7540285e99df41fccbd887952da0703ee85e Marc Feeley <feeley@iro.umontreal.ca> 1519400563 -0500	commit: Fix signal handling example
f01f7540285e99df41fccbd887952da0703ee85e ced889f263880624df51dfe12c4f8b015f3a8cfa Marc Feeley <feeley@iro.umontreal.ca> 1519401664 -0500	commit: Tweak GambitREPL makefile to remove -check option to gsc compiler, which is no longer supported
ced889f263880624df51dfe12c4f8b015f3a8cfa e539827a0654e53996335294aec1b15d0d4d174c Marc Feeley <feeley@iro.umontreal.ca> 1519410390 -0500	commit: Fix minor issues with makefiles
e539827a0654e53996335294aec1b15d0d4d174c 53e8b686a304367a2d37314d64132c32e3c95361 Marc Feeley <feeley@iro.umontreal.ca> 1519570847 -0500	commit: Make ANSI prototypes the default (add -D___FORCE_KR to use K&R function parameter type syntax)
53e8b686a304367a2d37314d64132c32e3c95361 44914a3372a171d53c06f5a5bdcc0611ae82e15a Marc Feeley <feeley@iro.umontreal.ca> 1519571090 -0500	commit: Make msys terminal (and pipes) nonbuffered by default on Windows
44914a3372a171d53c06f5a5bdcc0611ae82e15a 042985e16014653dc198dadb9f219da519e57c4c Marc Feeley <feeley@iro.umontreal.ca> 1519575117 -0500	commit: Build macOS prebuilt installer on High Sierra
042985e16014653dc198dadb9f219da519e57c4c 513b5baa5c949ae0aa5f59f275302a07b83c9521 Marc Feeley <feeley@iro.umontreal.ca> 1519615838 -0500	checkout: moving from master to cpu
513b5baa5c949ae0aa5f59f275302a07b83c9521 600e4034c993a29c636b9fbd266db51fd27a399a Marc Feeley <feeley@iro.umontreal.ca> 1519615844 -0500	pull: Merge made by the 'recursive' strategy.
600e4034c993a29c636b9fbd266db51fd27a399a 042985e16014653dc198dadb9f219da519e57c4c Marc Feeley <feeley@iro.umontreal.ca> 1519615908 -0500	checkout: moving from cpu to master
042985e16014653dc198dadb9f219da519e57c4c ba1e94c0604a5e72555eeb03973affd21e6280c5 Marc Feeley <feeley@iro.umontreal.ca> 1519616268 -0500	commit: [COMPILER CHANGES NEEDED FOR v4.8.9] Changed version in compiler
ba1e94c0604a5e72555eeb03973affd21e6280c5 d67e0eadad6e76fc9ed5584b7155d02e1041e709 Marc Feeley <feeley@iro.umontreal.ca> 1519616472 -0500	commit: [RUNTIME CHANGES NEEDED FOR v4.8.9] Changed version of runtime using misc/changev
